Discussion:
[UrJTAG-dev] How to configure FPGAs and PROMs
Torsten Wagner
2012-11-10 15:37:25 UTC
Permalink
Hi,

my first post to this list. So sorry if it sounds stupid.

How to configure a PROM or FPGA via urjtag?

At the moment I work with chips from Xilinx and from Xilinx own tool
"impact" I can set different configuration options. However, those are
NOT part of a generated SVF file.
They are included in the impact project file (ipf).

Just copy over the svf file is therefore not enough. One has to make
sure PROM or FPGA are correctly configured.
Impact does this in some way. E.g. I have a FPGA with a PROM and need
to set the "FPGA load" option under impacts programming parameters.
I can copy over the SVF file from both impact or urjtag, however the
FPGA only starts up if the PROM was copied over by impact, since it
takes care to set the "FPGA LOAD" flag which is important.

How to do this within urjtag?
There is the instruction command and some others and I tried a bit
around but couldn't see how this should work.

Thats the last part on a quest to get all this working under a Linux
environment with the Busblaster from Dangerous Prototypes.

As a random side question. I noticed that the SVN repository seems to
differ rather much already from the last release. Is there schedule
for any upcoming release?

Thanks

Torwag
Colin O'Flynn
2012-11-11 17:47:37 UTC
Permalink
Basically, you use impact in batch mode to write the SVF file, then use the
SVF file as an input to urjtag. I've described how I do this for programming
a CPLD in the following:

http://www.newae.com/tiki-index.php?page=SVF+Player+over+USB

I've used this exact same setup for FPGAs. I don't have good documentation
but can share some examples. See http://newae.com/sasebow and scroll down to
"2. Using the USB for Programming". I have some example scripts (for
Windows, but can easily change) on that page. The scripts can do the
following:
1. Convert a .bit file into a .svf file
2. Convert a .mcs file into a .svf file (NB: NOT tested, it crashes Impact
so I have to create the SVF manually, see my video also linked form that
page)
3. Run urjtag to program a SVF file in

You can setup all the scripts such you just run one command and it will do
everything (convert, download, etc). So it's pretty clean.

As a sidenote: if you have a FT2232 device it can directly run with Impact,
see http://www.newae.com/tiki-index.php?page=Using+JTAG+over+USB for some of
my instructions. It's VERY slow though, this will only be feasible for small
devices. You are going to see much better performance with Batch/SVF/urJTAG.

Good Luck!

-Colin O'Flynn

-----Original Message-----
From: Torsten Wagner [mailto:***@gmail.com]
Sent: November-10-12 11:37 AM
To: urjtag-***@lists.sourceforge.net
Subject: [UrJTAG-dev] How to configure FPGAs and PROMs

Hi,

my first post to this list. So sorry if it sounds stupid.

How to configure a PROM or FPGA via urjtag?

At the moment I work with chips from Xilinx and from Xilinx own tool
"impact" I can set different configuration options. However, those are NOT
part of a generated SVF file.
They are included in the impact project file (ipf).

Just copy over the svf file is therefore not enough. One has to make sure
PROM or FPGA are correctly configured.
Impact does this in some way. E.g. I have a FPGA with a PROM and need to set
the "FPGA load" option under impacts programming parameters.
I can copy over the SVF file from both impact or urjtag, however the FPGA
only starts up if the PROM was copied over by impact, since it takes care to
set the "FPGA LOAD" flag which is important.

How to do this within urjtag?
There is the instruction command and some others and I tried a bit around
but couldn't see how this should work.

Thats the last part on a quest to get all this working under a Linux
environment with the Busblaster from Dangerous Prototypes.

As a random side question. I noticed that the SVN repository seems to differ
rather much already from the last release. Is there schedule for any
upcoming release?

Thanks

Torwag

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Colin O'Flynn
2012-11-11 17:50:58 UTC
Permalink
I forgot to answer your specific question: you need to replicate ALL the
commands you are doing in Impact. You should be able to manually create a
SVF file graphically (see

for example).

Most likely your SVF file you created is incomplete. For example you need to
specify erase/program cycles etc. See the impact documentation to get all
the batch mode commands.

When doing it graphically you will be able to see a list of what impact is
doing too, so you can just use that as a basis for your batch mode file.

This should work fine then. I've programmed attached SPI flashes, which
means the SVF file includes downloading the access core, doing the SPI
access through that core, etc.

-----Original Message-----
From: Torsten Wagner [mailto:***@gmail.com]
Sent: November-10-12 11:37 AM
To: urjtag-***@lists.sourceforge.net
Subject: [UrJTAG-dev] How to configure FPGAs and PROMs

Hi,

my first post to this list. So sorry if it sounds stupid.

How to configure a PROM or FPGA via urjtag?

At the moment I work with chips from Xilinx and from Xilinx own tool
"impact" I can set different configuration options. However, those are NOT
part of a generated SVF file.
They are included in the impact project file (ipf).

Just copy over the svf file is therefore not enough. One has to make sure
PROM or FPGA are correctly configured.
Impact does this in some way. E.g. I have a FPGA with a PROM and need to set
the "FPGA load" option under impacts programming parameters.
I can copy over the SVF file from both impact or urjtag, however the FPGA
only starts up if the PROM was copied over by impact, since it takes care to
set the "FPGA LOAD" flag which is important.

How to do this within urjtag?
There is the instruction command and some others and I tried a bit around
but couldn't see how this should work.

Thats the last part on a quest to get all this working under a Linux
environment with the Busblaster from Dangerous Prototypes.

As a random side question. I noticed that the SVN repository seems to differ
rather much already from the last release. Is there schedule for any
upcoming release?

Thanks

Torwag

----------------------------------------------------------------------------
--
Everyone hates slow websites. So do we.
Make your web apps faster with AppDynamics Download AppDynamics Lite for
free today:
http://p.sf.net/sfu/appdyn_d2d_nov
Torsten Wagner
2012-11-12 09:22:21 UTC
Permalink
Hi Colin,

thank you very much for your help. Your video finally guided me to the problem.
Since some versions, impact offers a "One-Step" SVF generation option.
Michael Walle
2012-11-14 11:17:46 UTC
Permalink
Post by Torsten Wagner
Hi,
my first post to this list. So sorry if it sounds stupid.
How to configure a PROM or FPGA via urjtag?
if your fpga is supported, you can skip the svf generation and use the pld
command directly to configure your fpga, eg.
pld load bitstream.bit

see also doc/README.pld
--
michael
Colin O'Flynn
2012-11-16 18:17:57 UTC
Permalink
Cool! I missed that completely, will have to try it out, as that is much
easier.

For the FLASH programming, that is only parallel flash devices it looks
like? Or am I totally misreading the fjmem files?

Regards,

-Colin

-----Original Message-----
From: Michael Walle [mailto:***@walle.cc]
Sent: November-14-12 7:18 AM
To: Torsten Wagner
Cc: urjtag-***@lists.sourceforge.net
Subject: Re: [UrJTAG-dev] How to configure FPGAs and PROMs
Post by Torsten Wagner
Hi,
my first post to this list. So sorry if it sounds stupid.
How to configure a PROM or FPGA via urjtag?
if your fpga is supported, you can skip the svf generation and use the pld
command directly to configure your fpga, eg.
pld load bitstream.bit

see also doc/README.pld

--
michael


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Michael Walle
2012-11-16 22:46:49 UTC
Permalink
Post by Colin O'Flynn
For the FLASH programming, that is only parallel flash devices it looks
like? Or am I totally misreading the fjmem files?
Yes its parallel nor flash only atm.
--
Michael
Steve Franks
2013-06-18 22:08:46 UTC
Permalink
jtag> help pld
pld: unknown command

Not in 0.10???

Steve
Post by Michael Walle
Post by Torsten Wagner
Hi,
my first post to this list. So sorry if it sounds stupid.
How to configure a PROM or FPGA via urjtag?
if your fpga is supported, you can skip the svf generation and use the pld
command directly to configure your fpga, eg.
pld load bitstream.bit
see also doc/README.pld
--
michael
------------------------------------------------------------------------------
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web console. Get in-depth insight into apps, servers, databases, vmware,
SAP, cloud infrastructure, etc. Download 30-day Free Trial.
Pricing starts from $795 for 25 servers or applications!
http://p.sf.net/sfu/zoho_dev2dev_nov
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Michael Walle
2013-06-19 14:17:31 UTC
Permalink
Post by Steve Franks
jtag> help pld
pld: unknown command
Not in 0.10???
no, 0.10 is ancient ;) you have to use git head/svn trunk.
--
michael
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