Matheo Jr
2015-01-21 18:13:26 UTC
hello everyone
I need help with writing jtag hardware description file. i'm not skilled
yet.
I'm playing with ppc ibm 403gcx equipped board. bsdl file isn't
available.
however got pinout from manufacturer pdf, and after some playing with
urjtag +
simple logic analyzer I managed to pinpoint all needed data register
bits for
manipulationg flash with EXTEST command. banging from pregenerated
script let
me read whole flash contents. however, I really prefer to program memory
with
urjtag offered commands and hopefully prototype bus. I came across some
problem
while reconstructing urjtag hardware description file. I noticed that
data
register bits corresponding to data/address are organized different
after
shifting out than when shifting in. 'dr' readout bitstream is shifted by
one
bit number compared with bit places (data/addr) when shifting data
register
contents in. for example bits to setup data bus (flash organized 512k x
8)
occupy 21-30 bsr bits (with 2 bits gap inside), while data bus readout
bits are
reflected on 22-31 bsr bitstream.
how to describe function of 22 dr bit then? cpu data line is of I/O type
ofc.
shifted out bit 22 reflects state of D7 (data bus 7-th line), while that
same
bsr bit at shifting-in is devoted to setup D6 data line. I know of
control
cells, and probably found a few, but all examples/explanations i found
show
that bidirs are composed of 3 cells. where data seen on input pin is
latched by
some cell & presented on 'n' bsr bit, data to setup that pin state, when
at
output,must be shifted in on n+1 position (or another neighbour
position) to set
another cell. and one another control cell that controls direction /
hi-impedance state of one/group of 'pins'. no pin representing bits are
overlapped in respect to this idea.
in my case something is overlapping :(
what to do with this? is writing a dedicated bus type to overcome this
probl. is
really needed? please help with people with this.
BR, Matheo
Are there any public resources describing such deviations in boundary
scanning rules ?
Please guys, help. I'm resending this post again.
_____________________________________________________________
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I need help with writing jtag hardware description file. i'm not skilled
yet.
I'm playing with ppc ibm 403gcx equipped board. bsdl file isn't
available.
however got pinout from manufacturer pdf, and after some playing with
urjtag +
simple logic analyzer I managed to pinpoint all needed data register
bits for
manipulationg flash with EXTEST command. banging from pregenerated
script let
me read whole flash contents. however, I really prefer to program memory
with
urjtag offered commands and hopefully prototype bus. I came across some
problem
while reconstructing urjtag hardware description file. I noticed that
data
register bits corresponding to data/address are organized different
after
shifting out than when shifting in. 'dr' readout bitstream is shifted by
one
bit number compared with bit places (data/addr) when shifting data
register
contents in. for example bits to setup data bus (flash organized 512k x
8)
occupy 21-30 bsr bits (with 2 bits gap inside), while data bus readout
bits are
reflected on 22-31 bsr bitstream.
how to describe function of 22 dr bit then? cpu data line is of I/O type
ofc.
shifted out bit 22 reflects state of D7 (data bus 7-th line), while that
same
bsr bit at shifting-in is devoted to setup D6 data line. I know of
control
cells, and probably found a few, but all examples/explanations i found
show
that bidirs are composed of 3 cells. where data seen on input pin is
latched by
some cell & presented on 'n' bsr bit, data to setup that pin state, when
at
output,must be shifted in on n+1 position (or another neighbour
position) to set
another cell. and one another control cell that controls direction /
hi-impedance state of one/group of 'pins'. no pin representing bits are
overlapped in respect to this idea.
in my case something is overlapping :(
what to do with this? is writing a dedicated bus type to overcome this
probl. is
really needed? please help with people with this.
BR, Matheo
Are there any public resources describing such deviations in boundary
scanning rules ?
Please guys, help. I'm resending this post again.
_____________________________________________________________
Join the fastest growing e-mail service in the Pilippines. It's Free. It's cool. Go to http://www.e-mail.ph and Sign up now.